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  1 features ? 1024 x 1024 pixels with memory zone  up to 30 images/second  built-in antiblooming device provid ing an electric shutter function  pixel: 14 m x 14 m  image zone: 14.34 x 14.34 mm 2  two outputs at 20 mhz each  readout through 1 or 2 outputs  possible binning 2 x 2  optical shield against parasiti c reflexions and stray light  a/r window in 400 - 700 nm bandwidth description the th7888a is particularly designed for hi gh data rate applications (up to 30 pic- tures/second in 1024 x 1024 progressive scan format) in the medical and industrial fields. this area array image sensor consists of a 1024 x 1024 pixels (14 m x 14 m) image zone associated with a memory zone (masked with an optical shield). to increase the data rate, two separate outputs are provided, which can be used for par- allel readout (the readout frequency is up to 20 mhz/output, leading to a total readout frequency of 40 mhz). these two outputs allow three readout modes (single or dual port). the th7888a is designed with an antiblooming structure which provides an electronic shutter capability. moreover, the 2 x 2 binning mode is available on this sen- sor, providing an image size of 512 x 512 pixels with 28 m x 28 m pixels. the th7888a package is sealed with a specific anti-reflective window optimized in the 400 - 700 nm spectrum bandwidth on the sealed version. area array ccd image sensor (1024 x 1024 pixels with antiblooming) th7888a rev. 1999a?image?09/03
2 th7888a 1999a?image?09/03 figure 1. th7888a general sensor organization functional overview extra dark lines are provided for use as dark references or for smearing digital correc- tion. extra dark pixels are provided for dark line re ference clamping. each frame consists of 1056 video lines:  1 dummy line  12 useful dark reference lines (with optical shield)  3 isolation lines  1024 useful lines  3 isolation lines  12 dark reference lines (with optical shield)  1 dummy line each video line is made up of 546 or 1058 elements, depending on the readout mode (single or dual port mode):  12 inactive prescan elements  1 isolation prescan element  16 useful dark references (with optical shield)  5 isolation elements  512 or 1024 useful video pixels 1024 x 1024 image area 1024 x 1024 memory area p1,2,3,4 m1,2,3,4 a r l1-6 va m r vdr vdd2 vos2 vs2 vgs vdr vdd1 vos1 vs1 vgs bi-directional serial register
3 th7888a 1999a?image?09/03 pin description figure 2. pin overview table 1. pin description pin number symbol designation y9 p1 image zone clocks aa9 p2 y10 p3 aa10 p4 y5 m1 memory zone clocks aa5 m2 y6 m3 aa6 m4 y4 m memory to register clock b2 l1 readout register clocks a2 l2 a3 l3 b3 l4 b1 l5 a1 l6 a9 vdd1 output amplifier drain supply a8 vdd2 b10 vs1 output amplifier source supply b8 vs2 b7 vdp protection drain bias a6 vgs register output gate bias a10 vos1 video outputs b9 vos2 b4 r reset clock vss vss vss vss vss vss vss vdd1vdd2 vos2 vos1 p4 m m4 a p2 p1 p3 m3 m2 m1 r l4 l6 l5 l3 l2 l1 vs1 vs2 vdp vdr vgs nc nc nc nc nc nc va aa y b a 10 9 8 7 6 5 4 3 2 1 a1 index top view
4 th7888a 1999a?image?09/03 geometrical characteristics figure 3. pixel layout figure 4. aa cross section y7 a antiblooming gate clock a7 vdr reset bias aa7 va antiblooming diode bias a4, a5, b5, b6 vss substrate bias y8, aa4, aa8 vss table 1. pin description (continued) pin number symbol designation 14 m 14 m aperture 10 m a a a a va va p1 p1 p4 p3 p2 a a' p1 p1 p3 p4 p2 signal charge for one pixel transfer direction potential profile during integration time 14 m
5 th7888a 1999a?image?09/03 absolute maximum ratings* operating precautions shorting the video outputs to any pin, even temporarily, can permanently damage the on-chip output amplifier. storage temperature ..................................... -55c to +150c *notice: *stresses above those listed under absolute maximum ratings may cause permanent device failure. functionality at or above these limits is not implied. exposure to absolute maximum rat- ings for extended periods may affect device reli- ability. operating range defines the limits within which functionality is guaranteed. electrical limits of applied signals are given in the operating con- ditions section. operating temperature.................................... -40c to +85c thermal cycling..........................................................15c/mn maximum applied voltages:  pins: y9, aa9, y10, aa10, y5, aa5, y6, aa6, y4, b2, a2, a3, b3, b1, a1, b4, a6 ...........-0.3 v to 15 v  pins: a9, a8, b10, b8, b7, a7, aa7 ..............-0.3 v to 15.5 v  pin: y7..............................................................-0.3 v to 12 v  pins: a4, a5, b5, b6, y8, aa4, aa8................... 0 v (ground)
6 th7888a 1999a?image?09/03 operating conditions notes: 1. ground: note that the package metal back is grounded. 2. in dynamic mode, to avoid possible damage to the device, t he addition of a schottky diode is recommended (for example; diode reference bar 43s) between vs1 and vss ground in order to increase the potential on vs1, thus avoiding any direct mode diode current during clock transitions. readout mode the serial readout register is operated in a two-phase transfer mode. however, there are 6 separate command electrodes that should be connected differently, depending on the required readout mode. the following table gives the connections to be made for each mode. table 2. dc characteristics parameter symbol value unit min typ max output amplifier drain supply vdd1, vdd2 14.5 15 15.5 v protection drain bias vdp 14.5 15 15.5 v reset bias vdr 14.5 15 15.5 v antiblooming diode bias va 14.5 15 15.5 v register output gate bias vgs 2.2 2.5 2.8 v output amplifier source supply vs1 (2) , vs2 0 v ground (1) vss (2) 0v table 3. readout modes readout modes 1 output, vos 1 1 output, vos2 (mirror effect) 2 outputs (parallel) drive clocks (signals) l1 pins b2, b3, b1 pins b2, a3, a1 pins b2, b3, a1 l2 pins a2, a3, a1 pins a2, b3, b1 pins a2, a3, b1 table 4. timing parameters definition symbol comments vertical transfer period t v nominal value = 800 nm vertical transfer subdivision t o tv = 8 x to rise time tr for vertical transfer clocks (between 10% and 90% of the transition time) fall time tf readout register clock transition time t1 reset clock transition time t2 delay between output reset signal and reset clock td
7 th7888a 1999a?image?09/03 timing diagrams the following diagrams describe the 20 mhz readout frequency and 1.25 mhz vertical transfer frequency. figure 5. frame timing diagram figure 6. line timing diagram notes: 1. 12 pre-scan elements 2. 1 isolation element, 16 dark reference pixels, 5 isolation elements 3. 1024 useful video pixels (single output readout mode), 512 useful video pixels (dual output readout mode) a p1 p4 p3 p2 m2 m4 m3 m = m1 l1 r l2 integration image # i + 1 image readout memory cleaning period fast image to memory transfer 1 2 1056 1056 pulses 12 1056 see figure 6 see figure 7 m2 m4 m3 m = m1 l1 r l2 vos1 (vos2) 1 note 2 note 3 1 note 1 12 13 1058 (or 546) min 12 note 1 100 ns min 100 ns min 7to 5to 3to 3to 3to 3to 5to see figure 9
8 th7888a 1999a?image?09/03 figure 7. vertical transfer during image to memory zone transfer figure 8. transfer period from image zone to memory zone ( p and m for 1.25 vertical transfer frequency fv = 1: tv) note: tr = rise time tf = fall time to = vertical transfer time subdivision tv = vertical transfer period. a p1 p4 p3 p2 m4 m3 m2 m1 = m2 12 20 ns < tf < to 100 ns min 20 ns < tr < to 100 ns min 1056 see figure 8 tv = 800 ns 3 to 5 to to = tv /8 p3 = m3 p2 = m2 p1 = m1 p4 = m4 3 to 3 to 5 to 5 to 25 ns < t r < to/3 25 ns < tf < to/3 to = 100 ns t f t r
9 th7888a 1999a?image?09/03 figure 9. output diagram for readout register and reset clock 20 mhz applications crossover of complementary clocks ( l1, l2). between 30% and 70% of maximum amplitude. note: t1 = 7 ns typical t2 = 5 ns typical td = 8 ns typical delay time l1 r l2 v os (1,2) 50 ns 16 ns min 12 ns min t1 t2 td signal level reset feedthrough td t2 t1 16 ns min
10 th7888a 1999a?image?09/03 binning mode operation in binning mode operation, the image is composed of 512 x 512 pixels (28 m x 28 m each). figure 10. summation in the readout register of two adjacent lines note: to view fall and rise times see figure 8 on page 8 figure 11. summation of two adjacent pixels m1 m4 m2 m3 m = m1 l1 l2 100 ns min 100 ns min 15 t 0 5 t 0 5 t 0 5 t 0 5 t 0 5 t 0 5 t 0 3 t 0 3 t 0 3 t 0 3 t 0 3 t 0 3 t 0 3 t 0 output reset frequency divided by 2 useful signal pixel i + pixel i+1 pixel i l1 r l2 vos (1,2)
11 th7888a 1999a?image?09/03 exposure time reduction the th7888a provides an exposure time control (electronic shutter) function. the exposure time reduction is achieved by pulsing all the pi gates to 0 v to continu- ously remove all the photogenerated electrons through antiblooming drain va. figure 12. timing diagram for electronic shutter note: to view fall and rise times see figure 6 on page 7 frame period transfer obturation integration a p4 p3 p2 p1 1 s 2 s
12 th7888a 1999a?image?09/03 table 5. drive clock characteristics parameter symbol value unit remarks min typ max image zone clocks high level low level p1, 1, 3, 4 7.5 0 8 0.5 8.5 0.8 v v typical input capacitance 15 nf see figure 12 memory zone clocks high level low level m1, 2, 3, 4 7.5 0 8 0.5 8.5 0.8 v v typical input capacitance 15.5 nf see figure 12 memory register clocks high level low level m 8.5 0 9 0.5 9.5 0.8 v v typical input capacitance 10 pf antiblooming gate high level (integration) low level (transfer) a 3 0 4 0.5 7 0.8 v v typical input capacitance 14 nf see figure 12 and figure 14 reset gate high level low level r 10 0 12 2 13 3 v v typical input capacitance 10 pf readout register clocks high level low level l1, 2 8.5 0 9 0.5 9.5 0.8 v v maximum readout register frequency f h 20 ? ? mhz see figure 9 maximum image zone to memory zone transfer frequency f v 1.7 ? ? mhz see figure 14 2l 1 l 40 pf 40 pf 8 pf
13 th7888a 1999a?image?09/03 figure 13. drive clocks capacitance network table 6. static and dynamic elec trical characteristics parameter symbol value unit remarks min typ max output amplifier supply current i dd 10 15 ma per amplifier output impedance z s 200 225 250 ? dc output level v ref 11 v output conversion factor cvf 5.5 6 6.5 v/e- p4 p1 p3 p2 3.3 nf 2.8 nf 2.3 nf 3.3 nf 2.3 nf a substrate p1 p3 p2 p4 0.7 nf 0.5 nf 0.7 nf 0.5 nf va p1 p2 p4 p3 m4 m3 m2 m1 4.4 nf 4.4 nf 4.4 nf 4.4 nf 4.4 nf 4.4 nf 4.4 nf 3.4 nf 2.2 nf 3.2 nf 2.2 nf 3.4 nf 4.4 nf 3.9 nf 3.2 nf 3.9 nf
14 th7888a 1999a?image?09/03 electro-optical performance  general conditions: temp = 25c (package temperature) light source: 2854 k with 2 mm bg38 filter (unless specified) + f/3.5 optical aperture. 30 images per second mode (ti = 33 ms) under typical operating conditions  readout mode: 2 outputs  values exclude dummy elements and blemishes notes: 1. pixel saturation (full well) as a function of vertic al transfer frequency (see figure 14 on page 15) and antiblooming a djust- ment (see figure 15 on page 15). 2. after substraction of dark signal slope due to memory readout time. 3. first line level referenced from inactive prescan elements (12 samples). 4. last line level referenced from inactive prescan elements (12 samples). 5. measured with correlated double sampling (cds) including 160 v readout noise and dark current noise in general test conditions. 6. saturation to rms noise in darkness ratio. 7. at nyquist frequency. 8. vsat/2 measurement and 417 khz vertical transfer frequency. 9. vsat/2 measurement and 10 mhz horizontal transfer frequency. table 7. performance description and values parameter symbol value unit remarks min typ max output register saturation level v sat reg ? 2.6 ? v pixel saturation level v sat 1.6 1.9 3 v (1) pixel saturation charge (electron per pixel) q sat ? 320 ? ke- responsivity at 640 nm responsivity with bg38 filter r? 3 6.5 4 ? ? v/(j/cm 2 ) v/(j/cm 2 ) quantum efficiency at 640 nm qe ? 15 ? % see figure 17 photo response non uniformity (1 ) prnu ? 0.4 1.7 %vos dark signal non uniformity (1 ) dsnu ? 0.28 0.4 mv (2) average dark signal v ds ?23 mv (3) ?45.6mv (4) temporal rms noise in darkness (last line) v n ? 200 ? v (5) dynamic range d ? 80 ? db (6) horizontal modulation transfer function at 500 nm mtf ? 70 ? % (7) vertical charge transfer inefficiency (per stage) vcti ? ? 2.5.10 -5 ? (8) horizontal charge transfer inefficiency (per stage) hcti ? ? 5.10 -5 ? (9)
15 th7888a 1999a?image?09/03 figure 14. saturation level by full we ll with antiblooming off ( a high = 0 v) versus the vertical transfer frequency figure 15. saturation level limitation by the antiblooming ef fect on the pixel (typical operating conditions) saturation voltage (v) 2 1.8 1.6 1.4 1.2 200 700 1200 1700 vertical transfer frequency (khz) efficient antiblooming inefficient antiblooming inefficient antiblooming a high level clock (v) output saturation voltage (v)
16 th7888a 1999a?image?09/03 figure 16. smearing effect n esat = number of times e sat with e sat = v sat /responsivity (typical illumination conditions)  ti = integration time  tv = image to memory transfer time 10 810 6 4 2 0 0 10 20 30 40 50 smear ing/vsat(% ) % of overilluminated zone (height) 10 x e sat 100 x e sat v smearing v sat ----------------------------- n esat t v t i ------ h = b a h vsat a,b signal line smearing level overillumination vertical smearing
17 th7888a 1999a?image?09/03 figure 17. spectral response with a/r window (typical case) image quality grade blemish maximum area of 2 x 2 defective pixels. clusters less than 7 contiguous defects in a column. columns more than 7 contiguous defects in a column. general conditions room temperature ...........................................................25c frequency 30 images/s(under typical operating conditions) considered image zone ............. .............. ............. 1024 x 1024 light source 2854k with bg38 fi lter + f/3.5 optical aperture at vos = 0.7 vsat in darkness 0 2 4 6 8 10 350 400 450 500 550 600 650 700 750 800 850 900 950 1000 1050 1100 wavelength (nm) responsivity v/(j/cm2) type white black blemishes/clusters > 20% v os | | > 30% v os columns > 10% v os | | > 10% v os blemishes/clusters > 10 mv (*) columns > 5 mv (*) (*) reference is vo: average darkness signal
18 th7888a 1999a?image?09/03 number of defects total pixel numbers affected by blemishes and clusters .....100 maximum number of clusters........ ........................................10 maximum number of columns....... ..........................................5 : amplitude of video signal of defect wit h respect to mean output voltage v os ordering codes th7888avrhrb: sealed version TH7888AVRHN: unsealed version figure 18. ordering information key 1234567891011 th788a technological variants temperature range v: -40c to +85c package families r: pin grid array (pga) image grade h: high customer specification quality assurance level standard screening nothing b = mechanical mask package variants n: non-sealed window r: anti-reflective window
19 th7888a 1999a?image?09/03 package outline figure 19. package drawing for 40-lead pga notes: 1. all values are in mm. 2. black alumina 40-lead pga package 3. black optical mask (only on sealed version) 4. 400 nm ? 700 nm ar coated window (r < 1% per side). only on sealed version 5. metal back, (cuw ? copper tungsten) gold plated. electrically grounded (vss) 6. optical center 7. first useful pixel (readout through vos1) 8. mechanical reference 9. photosensitive area dim ensions 14,392(x) x 14,358(y) 6.90 0.20 8 0.3 0.1 0,734 0,1 17.25 0.20 2.31 0.30 2.19 0.25 pin no. = a1 index 26.50 0.3 52.0 0.6 0.5 3.04 + 0.04 - y x
20 th7888a 1999a?image?09/03 parameter mechanical dist ance optical distance unit z top 2.82 0.31 2.31 0.30 mm z bottom 1.68 0.15 2.19 0.25 mm
printed on recycled paper. ? atmel corporation 2003. atmel corporation makes no warranty for the use of its products , other than those expressly c ontained in the company?s standard warranty which is detailed in atmel?s terms and conditions located on the company?s web site. the company assumes no responsibility for any errors which may appear in this document, reserves the right to change devi ces or specifications detailed herein at any time without n otice, and does not make any commitment to update the information contained herein . no licenses to patents or other intellectual property of at mel are granted by the company in connection with the sale of atmel products, ex pressly or by implication. at mel?s products are not authorized for use as critical components in life support devices or systems. atmel headquarters atmel operations corporate headquarters 2325 orchard parkway san jose, ca 95131, usa tel 1(408) 441-0311 fax 1(408) 487-2600 europe atmel sarl route des arsenaux 41 case postale 80 ch-1705 fribourg switzerland tel (41) 26-426-5555 fax (41) 26-426-5500 asia room 1219 chinachem golden plaza 77 mody road tsimshatsui east kowloon hong kong tel (852) 2721-9778 fax (852) 2722-1369 japan 9f, tonetsu shinkawa bldg. 1-24-8 shinkawa chuo-ku, tokyo 104-0033 japan tel (81) 3-3523-3551 fax (81) 3-3523-7581 memory 2325 orchard parkway san jose, ca 95131, usa tel 1(408) 441-0311 fax 1(408) 436-4314 microcontrollers 2325 orchard parkway san jose, ca 95131, usa tel 1(408) 441-0311 fax 1(408) 436-4314 la chantrerie bp 70602 44306 nantes cedex 3, france tel (33) 2-40-18-18-18 fax (33) 2-40-18-19-60 asic/assp/smart cards zone industrielle 13106 rousset cedex, france tel (33) 4-42-53-60-00 fax (33) 4-42-53-60-01 1150 east cheyenne mtn. blvd. colorado springs, co 80906, usa tel 1(719) 576-3300 fax 1(719) 540-1759 scottish enterprise technology park maxwell building east kilbride g75 0qr, scotland tel (44) 1355-803-000 fax (44) 1355-242-743 rf/automotive theresienstrasse 2 postfach 3535 74025 heilbronn, germany tel (49) 71-31-67-0 fax (49) 71-31-67-2340 1150 east cheyenne mtn. blvd. colorado springs, co 80906, usa tel 1(719) 576-3300 fax 1(719) 540-1759 biometrics/imagin g/hi-rel mpu/ high speed converters/rf datacom avenue de rochepleine bp 123 38521 saint-egreve cedex, france tel (33) 4-76-58-30-00 fax (33) 4-76-58-34-80 literature requests www.atmel.com/literature 1999a?image?09/03 0m ? atmel corporation 2003 . all rights reserved. atmel ? is the registered trademark of atmel corporation or its subsidiaries. other terms and product names may be the trademarks of others.


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